Qoriq Trust Architecture 2.1 User Guide
QorIQ Trust Architecture 2.1 User Guide: Implementing Secure Boot and Device Security
Access to secure keys is granted; debug ports are locked down based on fuse configurations.
To obtain the full , you must: Visit the NXP QorIQ Community to request access. Contact your local NXP field applications engineer (FAE).
The TA 2.1 boot flow ensures a continuous chain of trust from reset to application execution. Step 1: Initialization
Using the CST utility, create a Command Sequence File (CSF) template defining the memory locations of your bootloader (e.g., U-Boot). Merge the CSF header, public key, and signature data directly onto the binary image. qoriq trust architecture 2.1 user guide
Full access to configuration registers; debug ports can be enabled.
For specific, step-by-step instructions, including secure boot enablement, it is highly recommended to consult the provided directly through the NXP Community or Document Portal under NDA.
: Secure boot is enabled via software flags (e.g., RCW[SB_EN] = 1 ) without permanently blowing fuses, allowing for testing and debugging.
The default phase during a boot or reset cycle. The hardware verifies images and registers before transitioning. QorIQ Trust Architecture 2
The SFP contains the secure fuses (fuses/OTP memory) that store root-of-trust keys, secure boot enabling bits, and security policies. Once blown, these cannot be reverted, creating a permanent, immutable anchor. B. Secure Boot (Chain of Trust)
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: Support for Arm TrustZone or similar hardware partitioning to separate secure and non-secure execution environments.
Hardware acceleration for RSA and Elliptic Curve Cryptography (ECC) used in digital signatures and key exchange. The TA 2
Use the private key to sign the bootloader image (e.g., U-Boot) and create a signature header.
These enhancements make Trust Architecture 2.1 a powerful security solution for modern, ARM-based embedded systems.
The foundation of QorIQ TA 2.1 security relies on a cryptographic Chain of Trust. If any link in this chain fails verification, the system halts execution to prevent compromise.
Ensure that the JTAG debug fuse is blown on production boards to prevent attackers from attaching hardware debuggers to dump system memory.
: The ISBC uses the validated public key to verify the digital signature of the next stage (e.g., U-Boot or TF-A).
The device boots without enforcing cryptographic signature checks. Security features are accessible for testing, and the OEM public key hash has not been permanently locked. Secure State (Production)
